1. Field of the Invention
The present invention relates to a semiconductor device and a process of producing the same, particularly a semiconductor device having a multilayered conductor wiring structure including an upper conductor wiring layer is electrically connected to a lower conductor wiring layer through a contact hole and a process of producing the same.
2. Description of the Related Art
The recent progress in the integration of semiconductor devices has included further refinement of semiconductor elements and the development of multilayered conductor wiring structures.
In the development of multilayered conductor wiring structures, to provide an improved resistance to electromigration and stress migration, which would otherwise cause an increase in the wiring resistance and number of disconnections, it is known that a barrier metal layer and a cap metal layer of a Ti-based film such as Ti, TiN, TiW can be formed on the upper and lower surfaces of a conductor wiring layer composed of an aluminum alloy.
A conductor wiring layer having the above-mentioned triple-layer structure is used to form a multilayered conductor wiring structure such as a two-layer structure, in which a contact hole is formed through an interlaminar insulating layer to electrically connect upper and lower conductor wiring layers through the interlaminar insulating layer.
The contact hole occasionally contains an undesirable denaturated layer of oxides or nitrides formed on the bottom surface thereof defined by the upper surface of the cap metal layer of the underlying lower conductor wiring layer.
To remove the denaturated layer, there are proposed a method in which a gas mixture of a fluorine-based gas and an inert gas is used to etch the denaturated layer (Japanese Unexamined Patent Publication (Kokai) No. 3-44930) and a method in which the same gas mixture is used to open a contact hole by reactive ion etching (RIE).
When a contact hole is formed by reactive ion etching using the gas mixture of a fluorine-based gas and an inert gas as mentioned above, the cap metal layer of the lower conductor wiring layer and the fluorine-based gas of the gas mixture react with each other to form a fluorine compound layer on the upper surface of the cap metal layer in the portion exposed in the contact hole, the portion defining the bottom surface of the contact hole.
The fluorine compound layer is conventionally removed by sputter-etching using an inert gas.
To ensure complete removal of the fluorine compound layer, the sputter-etching must be continued for a long time, during which not only the fluorine compound layer is sputtered but also the interlaminar insulating layer having a large area is sputtered or bombarded by the inert gas ions to generate splash particles, which redeposit on the exposed portion of the cap metal layer within the contact hole.
When an upper conductor wiring layer is formed by filling a conductor material in the contact hole, a deposit layer of the splash particles remains at the interface between the upper and lower conductor wiring layers to cause a detrimental problem that the contact resistance arises and the long term reliability of the interwiring connection is lost.
To solve this problem, Japanese Unexamined Patent Publication (Kokai) No. 5-36839, for example, proposed a method in which a photoresist used for forming a contact hole is left unremoved and a fluorine compound layer on the contact hole bottom is removed by sputter-etching using the photoresist as a mask.
This method prevents deposition of splash particles on the contact hole bottom when a thick fluorine compound layer on the contact hole bottom is sputter-etched, because an interlaminar insulating layer is covered with the photoresist and is not subject to the sputter-etching.
However, the method of Japanese Unexamined Patent Publication (Kokai) No. 5-36839 has a drawback in that sputter-etching must be continued for a long time to remove a thick fluorine compound layer on the contact hole bottom, which prevents a time reduction in the production of semiconductor devices.